1. Field of the Invention
The invention relates to a method for fabricating semiconductor device, and more particularly, to a method of increasing ambient pressure around gate structure by introducing low activity gas before spacer formation.
2. Description of the Prior Art
In current semiconductor industry, polysilicon has been widely used as a gap-filling material for fabricating gate electrode of metal-oxide-semiconductor (MOS) transistors. However, the conventional polysilicon gate also faced problems such as inferior performance due to boron penetration and unavoidable depletion effect which increases equivalent thickness of gate dielectric layer, reduces gate capacitance, and worsens driving force of the devices. In replacing polysilicon gates, work function metals have been developed to serve as a control electrode working in conjunction with high-K gate dielectric layers.
In current fabrication of high-k metal transistor, spacer formation is typically accomplished by using furnace to deposit dielectric layer such as silicon carbon nitride along with a temperature ramp approach before etching back the dielectric layer for forming spacer. Devices obtained through this approach however still reveal unsatisfactory current leakage result. Hence, how to improve the current fabrication for fabricating high-k metal gate transistor has become an important task in this field.